| Host Bus: |
- 33-MHz/32-Bit PCI Interface
- 3.3-V and 5-V PCI Signaling Environment
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| IEEE 1394 Std Support: |
- Fully Supports Provisions of IEEE P1394b Revision 1.33+ at 1-Gigabit Signaling Rates
- Fully Supports Provisions of IEEE 1394a.2000 and 1394.1995 Standard for High Performance Serial Bus
- Fully Interoperable With Firewire., i.LINK., and SB1394., Implementation of IEEE Std 1394
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| 1394 Bus Transfer Rate: |
Provides three fully backward-compatible, (IEEE Std 1394a-2000 fully compliant) Bilingual IEEE Std 1394b-2002 cable ports at S100/S200/S400/S400B/S800 megabits per second (Mbits/s).
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| IEEE-1394 to PCI Controller |
- Texas Instruments TSB83AA23
- PCI burst transfers and deep FIFOs to tolerate large host latency
- Transmit FIFO—5K asynchronous
- Transmit FIFO—2K isochronous
- Receive FIFO—2K asynchronous
- Receive FIFO—2K isochronous
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| DV and DA Enhancement: |
- Digital Video and Audio performance enhancements.
- Extended resume signaling for compatibility with legacy DV components.
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| Power Management : |
D0, D1, D2, and D3 power states and PME events per the PCI Bus Power Management Interface Specification
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| Number of ports: |
- FWB-PCI3202A: Two External Bilingual Ports (with screw lock)
+ One FireWire Port
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| Bus Power Connector: |
Big IDE 4-pin DC Power Connector
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