Highlights
  • Host Bus: 1-lane 2.5 Gb/s PCI Express
  • Complies with 1394 OHCI draft 1.2
  • Three Bilingual IEEE Std 1394b-2002 Cable Ports
    • One external Port (with screw lock)
    • Two internal Ports
Introduction

FWB-PCIE1X12 is designed with Texas Instruments XIO2213B controller.

The Texas Instruments XIO2213B is a PCI Express to PCI translation bridge where the PCI bus interface is internally connected to a 1394b open host controller link-layer controller with a three-port 1394b PHY. The PCI-Express to PCI translation bridge is fully compatible with the PCI Express to PCI/PCI-X Bridge Specification, Revision 1.0. Also, the bridge supports the standard PCI-to-PCI bridge programming model. The 1394b OHCI controller function is fully compatible with IEEE Standard 1394b and the latest 1394 Open Host Controller Interface (OHCI) Specification.

Deep FIFOs are provided to buffer 1394 data and accommodate large host bus latencies. The device provides physical write posting and a highly tuned physical data path for SBP-2 performance. The device is capable of transferring data between the PCI Express bus and the 1394 bus at 100M bits/s, 200M bits/s, 400M bits/s, and 800M bits/s.

FWB-PCIE1X12 provides full PCI Express and 1394b functionality and performance.
Technical Specifications

PCI Express
  • Full x1 PCI Express Throughput
  • Fully Compliant with PCI Express Base Specification, Revision 1.1
  • Utilizes 100-MHz Differential PCI Express Common Reference Clock

OHCI Link and IEEE 1394 PHY

  • Fully supports provisions of IEEE P1394b-2002
  • Fully Compliant With Provisions of IEEE Std 1394-1995 for a High-Performance Serial Bus and IEEE Std 1394a-2000
  • Fully Compliant with 1394 Open Host Controller Interface Specification, Revision 1.1 and Revision 1.2 draft
  • Three IEEE Std 1394b Fully Compliant Cable Ports at 100M Bits/s, 200M Bits/s, 400M Bits/s, and 800M Bits/s
  • Cable Ports Monitor Line Conditions for Active Connection To Remote Node
  • Cable Power Presence Monitoring
  • EEPROM Configuration Support to Load the Global Unique ID for the 1394 Fabric
  • Active State Link Power Management Saves Power When Packet Activity on the PCI Express Link is Idle, Using Both L0s and L1 States
  • Support for D1, D2, D3hot
Number of Ports:
  • One External Bilingual IEEE Std 1394b-2002 Cable Port (with screw lock)
  • Two Internal Bilingual IEEE Std 1394b-2002 Cable ports
Bus Power Connector:
  • Big IDE 4-pin DC Power Connector
Operating System Requirements
  • Windows 2000/XP/7/8/8.1 and Windows Server 2003
  • Linux kernel 2.6.14 or later
  • Mac OS X 10.3 or later
Certifications
  • CE Test: Pass
  • FCC Test : Pass

     

Optional Accessories
  • Low Profile PCI Bracket
    • S-BR-00166-06