Primary PCI Express |
- Standards compliant
- PCI Express Base Specification r2.0 (Backwards compatible with PCIe r1.0a/1.1)
- PCI Power Management Spec r1.2
- Microsoft Vista®-compliant
- Supports Access Control Services
- Dynamic Link-width control
- Dynamic SerDes speed control
- High Performance
- Non-Blocking Internal architecture
- Full line rate on all Ports
- Cut-Thru latency: 130ns
- 2KB max payload size
- PCI Express Power Management
- Link power management states: L0, L0s, L1, L2/L3 Ready, and L3
- Device states: D0 and D3hot
- Quality of Service (QoS) support
- Two Virtual Channels (VC) per Port
- Eight Traffic Classes per Port
- Weighted Round-Robin Port & VC Arbitration
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Secondary PCI Express |
- Four Single (x1) PCI Express Lane
- Supports PCI Express Specification Revision 2.1 at 5GT/s
- Supports PCI Bus Power Management Interface Specification revision 1.2
- Support for Latency Tolerance Reporting (PCIe)
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USB Features |
- Compliant with USB 3.0 Specification Revision 1.0
- Compliant with Extensible Host Controller Interface (xHCI) Specification revision 1.0
- 4 downstream USB ports support SS/HS/FS/LS data rates (5Gbps/480Mbps/12Mbps/1.5Mbps)
- Supports UASP (USB Attached SCSI Protocol)
- Supports xHCI debug capability
- Support for Ultra High-performance isochronous applications
- Support for Latency Tolerance Tolerance Messaging (USB)
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Advanced Power Saving |
- Support all USB 3.0 Power States: U0, U1, U2 and U3
- Support USB 2.0 Link Power management (LPM)
- PCIe Active State Power Management (ASPM) L0s and L1
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USB3 cable lock mechanism |
- Provides the threaded holes for the jack-screws of USB 3.0 A Plug w/Jackscrew lock Cable
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USB Bus Power Input |
5V from
either ATA 4-pin Power Connector (J1)
or/and SATA 15pin Power Connector (J2) |